CY2XP31
Features
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- Functional Description
The CY2XP31 is a PLL (Phase Locked Loop) based high performance clock generator. It is optimized to generate 10 Gb Ethernet, SONET, and other high performance clock frequencies. It also produces an output frequency that is 12.5 times the crystal frequency. It uses Cypress’s low noise VCO technology to achieve less than 1 ps typical RMS phase jitter, which meets both 10 Gb Ethernet and SONET jitter requirements. The CY2XP31 has a crystal oscillator interface input and one LVPECL output pair.
One LVPECL output pair Output frequency: 312.5 MHz External crystal frequency: 25 MHz Low RMS phase jitter at 312.5 MHz, using 25 MHz crystal (1.875 MHz to 20 MHz): 0.3 ps (typical) Pb-free 8-Pin TSSOP package Supply voltage: 3.3 V or 2.5 V mercial and industrial temperature ranges
Logic Block Diagram
XIN External Crystal XOUT /25 OE CRYSTAL OSCILLATOR PHASE DETECTOR VCO /2 CLK CLK#
Pinouts
Figure 1. Pin Diagram
- 8-Pin TSSOP
VDD VSS XOUT XIN
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